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A*STAR Quantum Innovation Centre spin-out

Control. At 4 K.

Building the cryo-control standard for quantum computing.
Semiconductor-compatible.
Built in Singapore.

Explore QELVIN ↗Watch the video ↓
CRYOGENIC QUANTUM CONTROL4 K | BUILT IN SINGAPORE

Built in Singapore

Quantum control,
closer to the qubits.

Explore QELVIN ↗The technology →
Inside Qifrost
Quantum control, closer to the qubits.4 K / Cryo-CMOS
Global Quantum Industry Group (GQIG)

GQIG / QUANTUM DEALFLOW LIVE / IMEC, LEUVEN

Excellence Award.

Qifrost received the Quantum Innovation Excellence Award at GQIG’s Quantum Dealflow Live in Leuven. Control electronics at 4 K reduce wiring, thermal load and system complexity as qubit counts scale.

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Q2B logo

Q2B COPENHAGEN / STARTUP PITCH COMPETITION

Winner at Q2B.

Qifrost won the Q2B Startup Pitch Competition in Copenhagen, run by the BioInnovation Institute and hosted by QC Ware. The jury spanned 55 North, Novo Holdings, Playground Global, QuNorth, Microsoft and QAI Ventures, with seven finalists from five countries.

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NAMIC logo

NAMIC SINGAPORE / STARTUP INNOVATION FORUM 2026

Grand Winner.

Next stop, SLINGSHOT.

Qifrost won the pitching competition at NAMIC Singapore’s Startup Innovation Forum 2026, earning a fast track to the SLINGSHOT 2026 Top 50 Finals at SWITCH this October.

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QDNL logo

EVENTS / AMSTERDAM

Singapore at Quantum Meets 2026.

Eric W. Cao represented Singapore at Quantum Meets 2026 in Amsterdam, discussing the research, partnerships and commercial ecosystem needed to build a quantum industry.

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PERSPECTIVE

Building Singapore’s quantum hardware industry.

Qifrost shares its perspective on Singapore’s role in quantum hardware manufacturing and the transition from research to commercial delivery.

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QELVIN | CRYOGENIC CONTROL

Precision.
Layer by layer.

Control moves closer to the qubits.

Conceptual package illustration

Cryo-CMOS
log n
Wiring scaling, not 1:1
FD-SOI
commercial foundry node
4 K
Validated silicon | also 77K, 300K
Q QELVIN qubit array 4 K CRYO-CMOS CONTROL ASIC
Discover QELVIN ↓ See the Technology →
Our Platform

Cryogenic control, built on standard CMOS

Qifrost complements qubit developers by owning the full design-to-packaging stack for cryo-control in a key semiconductor node of Southeast Asia. Design, cryogenic test, characterization and packaging in-house. Device fab outsourced at leading foundries.

QELVIN
Cryo-control
architecture
→Explore our QELVIN™ technology

QELVINTM is the control layer that breaks through the quantum wiring wall. It runs at 4K inside the cryostat, adjacent to the qubits: one chip quietly conducting thousands of them, so cabling scales as log(n) and the gold-wire tangle disappears. Validated silicon, already running in the cold.

Capabilities

Everything below the qubit layer

A full cryo-control stack: designed, taped out, packaged and validated in-house.

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WHERE IT LIVES IN THE STACK
300 K | room temp4 K | QELVIN~mK | qubits
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Built In-House

Under one roof

Design, cryogenic test, characterisation and packaging in-house. Only the wafer fab is outsourced.

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Publications

Selected Research

Peer-reviewed work from our team and collaborators across cryogenic CMOS control and superconducting advanced packaging, published with IEEE.

Let's build the quantum future together

Whether you're a potential customer, collaborator, investor or just curious, we'd love to hear from you.

Get in Touch →
Technology

Quantum scale starts
with control at 4 K.

Today's control architecture hits two physical walls. Both get worse with every qubit you add, and 1M+ qubit targets demand on-chip classical control.

Cryostat gold plate with control wires and coils
Inside the cryostatQuantum-computer visualizationCryostat visualization
WALL 01
The Wiring Bottleneck
●3 to 5 coaxial cables per qubit, run from 300K down to ~mK.
●4,000+ cables at just 1,000 qubits: physically unscalable.
●RT I/O round-trip latency runs in the tens of nanoseconds, long enough to break the feedback loop quantum error correction needs. Moving control to 4K targets a 10x reduction in that latency.
At 1,000 qubits the cable count alone is 4,000+. Conventional 1:1 wiring hits the wall.
Conventional cryostat control wiring
conventional wiring: one line per control channel
300 K 4 K ~mK QELVIN @ 4K ≤ 1 mW / qubit qubits cooling power at 4K is tiny, every milliwatt counts
WALL 02
The 4K Power Budget
●Every mW dissipated at 4K costs roughly 1 W of cooling, so the budget is ~1 mW / qubit.
●Carrier freeze-out, mobility shift and threshold drift change every device.
●Each block needs dedicated cryogenic characterisation.

Every milliwatt dissipated inside a 4K cryostat requires roughly a watt of cooling power to remove it - a real-world overhead of about 1,000×. That's steeper than the ~75× implied by the ideal thermodynamic (Carnot) limit between 4K and 300K, because real cryocoolers run at only a fraction of ideal efficiency. Every watt they draw at room temperature has to be wired in, powered, and dissipated somewhere - which is why the power budget for electronics living at 4K is so tight, and why every milliwatt of on-chip dissipation counts.

Standard CMOS models break at 4K, so silicon must be re-characterised and re-designed for the cold.
QELVIN QELVIN | 4 K TSV interposer qubit array | ~mK CRYO-CMOS CONTROL STACK
The Qifrost answer

Move control into the cold, directly closer to the qubits

QELVIN, Qifrost's cryo-CMOS control layer, replaces much of the room-temperature rack today. It interfaces with a TSV interposer, on Qifrost's roadmap, and a customer-provided qubit array bonded beneath, while on-chip sequencing distributes each control resource across many qubits.

1
QELVIN cryo-CMOS: control & readout ASICs at 4K, log(n) wiring
2
TSV interposer: CMOS-compatible superconducting packaging
3
Qubit array: superconducting, spin or photonic
Where the wiring problem lives

Today vs future: how many lines reach the qubits

Control starts digital, at the computer. Today, room-temperature electronics turn it analog at the rack, and a thick bundle of lines runs the full 300 K-to-~mK span into the cryostat. Qifrost’s QELVIN converts to analog right at 4 K, next to the qubits, so only a handful of short lines remain.

Today
A thick bundle of lines runs the full 300 K-to-~mK span
300 K 4 K ~mK 300 K Computer Rack qubits

More qubits means more analog lines running the full cryostat span, from the room-temperature rack down to the qubits.

Future of Quantum Computing
QELVIN cuts that down to a few short lines at 4 K
300 K 4 K ~mK Computer Digital QELVIN Analog qubits

QELVIN converts to analog right next to the qubits, at 4 K, collapsing that bundle down to a handful of short lines.

Control electronics run at 300 K, about 300× hotter than the qubits at ~mK. Qifrost moves the digital-to-analog boundary to 4 K, adjacent to the qubit layer, cutting the number of lines that cross the full cryostat.

The scaling problem, visualised

Cables vs qubit count

Conventional control wiring grows linearly and hits a wall. On-chip sequencing keeps it flat.

Conventional (1:1 wiring) Qifrost QELVIN (log n)
Conventional
One cable bundle per qubit, all the way down
QPU
Qifrost QELVIN
Control silicon adjacent to qubits, far fewer lines in
QELVIN QPU

See how QELVIN solves it

Explore the control platform, validated silicon and technical specifications.

Explore the Product →
Product

QELVIN

Cryogenic Quantum Controls

Electronic components for qubit control and readout that operate in the cryogenic regime, adjacent to the qubit layer. One control resource addresses many qubits through on-chip sequencing, so wiring scales as log(n) rather than 1:1 with qubit count.

→Cryo-CMOS control & readout ASICs on FD-SOI, validated at 4K, 77K and room temperature
→TSV-type cryo packaging, CMOS-compatible, for adjacent-to-qubit integration
→Multiplexed sparse control: < 3dB insertion loss, 25 to 35 dB isolation, switching in nano seconds
→Platform-agnostic: superconducting, spin and photonic architectures
QELVIN QELVIN | 4 K TSV interposer qubit array | ~mK CRYO-CMOS CONTROL STACK

Technical specifications

Target specifications at 4 K. Full datasheet available under NDA.
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Validated silicon

Five validated blocks, designed, taped out and validated at 4K / 77K / 300K through A*STAR Q.InC. Now migrating onto FD-SOI.

Want the full datasheet or a technical call?

Tell us your platform and qubit count, and we'll share specs and integration detail.

Contact the team →
The Trajectory

Three generations of the stack

The cryogenic layer Qifrost owns grows with every generation, and control keeps moving closer to the qubits.

GENERATION 1 PRE-2026

Control still lives at 300 K

Classical Compute (FPGA / ASIC) and Control / Readout both sit in the room-temperature rack.
Qubit Layer: superconducting & Si-spin, at ~mK: nothing cryogenic sits between the rack and the qubits yet.
~10² qubits
GENERATION 2 2027 – 2030

QELVIN takes over at 1–4 K

Classical Compute stays at 300 K.
DAC+DEMUX / MUX+ADC Control / Readout moves to the 1–4 K cryo stage.
Owned by Qifrost.
Qubit Layer: superconducting & Si-spin, at ~mK.
~10³ qubits
GENERATION 3 2030+

The cryo-interposer completes the stack

Classical Compute remains the only thing left at 300 K.
Control / Readout and the Cryo-interposer both run at 1–4 K.

The cryo-interposer sits directly between the QELVIN control chip and the qubit layer, both cooled to the same 4 K stage. Because it's a through-silicon-via (TSV), CMOS-compatible layer rather than off-chip wiring, it lets thousands of short, dense electrical connections replace long cable runs - cutting the parasitic capacitance and latency that degrade qubit control fidelity, while remaining manufacturable on standard semiconductor lines rather than built by hand.

Qubit Layer: superconducting & Si-spin, at ~mK.
~10⁶ qubits
BOTTOM LINE Every generation pushes control closer to the qubits: the 4K layer is the only viable path to scaled quantum computers.
Architecture

Inside the control / readout layer

Conceptually a generic RF transceiver, with qubits instead of the antenna. The blocks between the room-temperature interface and the qubit array sit at 4 K: that's the layer Qifrost builds.

Beachhead: proven today
16-bit DAC / ADC core
1–2 GS/s
0.2 mW
60 dB SFDR
~20 mVrms output
< 1 DNL / INL
Fabricated on FD-SOI
START: the 16-bit DAC/ADC coreEND: the complete qubit interface
CONTROLDAC → filter → up-convert → driver → DEMUX
READOUTMUX → LNA → down-convert → filter → ADC
Digital control at the room-temperature interface drives the chain; the quantum processor sits at the far end. Both paths live at 4 K, adjacent to the qubits at ~mK.
BOTTOM LINE The blocks between the room-temperature interface and the qubit array sit at 4 K: this is the layer Qifrost builds.
Why Qifrost

Two advantages that compound

SG
The A*STAR | Singapore advantage

Spun out of the A*STAR Quantum Innovation Centre, with direct access to Singapore's mature semiconductor supply chain: fabs, packaging and talent. Cryo silicon built to be manufactured, not just demonstrated.

4K
The cryo-CMOS advantage

Cryogenic CMOS brings conversion and sequencing into the cold stage, close to the quantum processor. Local multiplexing concentrates control across large qubit arrays, sharply reducing the cable count. CMOS-compatible packaging and validated silicon replace the cable spaghetti.

Partner with us on the next phase

Get in Touch →
News

Latest from Qifrost

Company news, milestones and perspectives.

Series

The Cryo Dweller

Cover of The Cryo Dweller Issue 01
Diego Van HemelryckDiego Van Hemelryck
PDF · 6 Pages

The Cryo Dweller: Issue 01

Diego Van Hemelryck launches The Cryo Dweller, a recurring roundup of research papers shaping cryogenic quantum hardware: one paper per card, from 6 K down to 70 mK, with links to the source papers.

Open the PDF ↗
CryoNews

What's moving in cryogenic electronics

The research and breakthroughs building the cold layer: a curated read on the science across the cryo-CMOS ecosystem. Twice a month.

300K→4K|ISSUE 01 | JULY 2026
In This Issue
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Team

Founder-led and A*STAR-trained

The team that designed, taped out, and validated the cryo-CMOS: deep cryo-electronics expertise paired with INSEAD commercial leadership.

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Learn more
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Learn more

Origin: Spin-out from the A*STAR Quantum Innovation Centre, with extensive government lab resources and established foundational research.
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CAREERS / QIFROST

Careers

Interested in talking to us? Send an email to leo@qifrost.com.

CONTACT / SINGAPORE

Let's build what
comes next.

Talk to us about cryogenic control, technical collaboration, partnerships or investment.

Send us a message

We read everything that comes through and reply personally.

or email us directly at eric@qifrost.com
Qifrost
Semiconductor-compatible cryogenic control systems for quantum computing. An A*STAR Q.InC spin-out, built in Singapore.
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